Measuring angle of incidence in an ultrawideband communication system

ABSTRACT

In an ultra-wideband (“UWB”) receiver, a received UWB signal is periodically digitized as a series of ternary samples. During a carrier acquisition mode of operation, the samples are continuously correlated with a predetermined preamble sequence to develop a correlation value. When the value exceeds a predetermined threshold, indicating that the preamble sequence is being received, estimates of the channel impulse response (“CIR”) are developed. When a start-of-frame delimiter (“SFD”) is detected, the best CIR estimate is provided to a channel matched filter (“CMF”). During a data recovery mode of operation, the CMF filters channel-injected noise from the sample stream. Both carrier phase errors and data timing errors are continuously detected and corrected during both the carrier acquisition and data recovery modes of operation. The phase of the carrier can be determined by accumulating the correlator output before it is rotated by the carrier correction. By comparing the carrier phases of two receivers separated by a known distance, d, the angle of incidence, θ, of the signal can be determined.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is the U.S. National Stage of PCT Application No.PCT/EP2014/060722, filed 23 May 2014 (“Parent PCT Application”).

The subject matter of this Parent PCT Application is aContinuation-in-Part of and is related to application Ser. No.13/775,282, filed 28 Mar. 2013, now U.S. Pat. No. 8,760,334, issued 24Jun. 2014 (“First Related Application”).

The subject matter of this Application is related to application Ser.No. 13/033,098, filed 23 Feb. 2011 (“Second Related Application”), whichis in turn related to Provisional Application Ser. No. 61/316,299, filed22 Mar. 2010 (“Related Parent Provisional”).

The subject matter of this First Related Application is aContinuation-in-Part of and is related to application Ser. No.12/885,517, filed 19 Sep. 2010, now U.S. Pat. No. 8,437,432, issued 7May 2013 (“Related Parent Patent”), which is in turn also related to theRelated Parent Provisional.

The subject matter of this Application is also related to the subjectmatter of PCT Application Serial No. PCT/EP2013/070851, filed 7 Oct.2013 (“Third Related Application”).

This application, and the subject matter herein, is related claimspriority to:

1. The Parent PCT Application;

2. The First Related Application;

3. The Second Related Application;

43. The Related Parent Patent; and

54. The Related Parent Provisional; and

6. The Third Related Application;

collectively, “RelatedPriority References”, and hereby claims thebenefit of the filing date thereof pursuant to 37 C.F.R. § 1.78.(a)(4).

The subject matter of the Related Priority References, the SecondRelated Application, and the Third Related Application, each in itsentirety, is expressly incorporated herein by reference.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates generally to ultra-wideband communicationsystems, and, in particular, to a receiver for use in an ultra-widebandcommunication system adapted to determine the angle of arrival of an RFsignal.

2. Description of the Related Art

In general, in the descriptions that follow, we will italicize the firstoccurrence of each special term of art which should be familiar to thoseskilled in the art of ultra-wideband (“UWB”) communication systems. Inaddition, when we first introduce a term that we believe to be new orthat we will use in a context that we believe to be new, we will holdthe term and provide the definition that we intend to apply to thatterm. In addition, throughout this description, we will sometimes usethe terms assert and negate when referring to the rendering of a signal,signal flag, status bit, or similar apparatus into its logically true orlogically false state, respectively, and the term toggle to indicate thelogical inversion of a signal from one logical state to the other.Alternatively, we may refer to the mutually exclusive boolean states aslogic_0 and logic_1. Of course, as is well known, consistent systemoperation can be obtained by reversing the logic sense of all suchsignals, such that signals described herein as logically true becomelogically false and vice versa. Furthermore, it is of no relevance insuch systems which specific voltage levels are selected to representeach of the logic states.

In general, in an ultra-wideband (“UWB”) communication system, a seriesof special processing steps are performed by a UWB transmitter toprepare payload data for transmission via a packet-based UWB channel.Upon reception, a corresponding series of reversing steps are performedby a UWB receiver to recover the data payload. Details of both series ofprocessing steps are fully described in IEEE Standards 802.15.4(“802.15.4”) and 802.15.4a (“802.15.4a”), copies of which are submittedherewith and which are expressly incorporated herein in their entiretyby reference. As is known, these Standards describe required functionsof both the transmit and receive portions of the system, but specifyimplementation details only of the transmit portion of the system,leaving to implementers the choice of how to implement the receiveportion.

One or more of us have developed certain improvements for use in UWBcommunication systems, which improvements are fully described in thefollowing pending applications or issued patents, all of which areexpressly incorporated herein in their entirety:

“A Method and Apparatus for Generating Codewords”, U.S. Pat. No.7,787,544, issued 31 Jul. 2010;

“A Method and Apparatus for Generating Codewords”, application Ser. No.11/309,222, filed 13 Jul. 2006, now abandoned;

“A Method and Apparatus for Transmitting and Receiving ConvolutionallyCoded Data”, U.S. Pat. No. 7,636,397, issued 22 Dec. 2009;

“A Method and Apparatus for Transmitting and Receiving ConvolutionallyCoded Data”, U.S. Pat. No. 8,358,709, issued 22 Jan. 2013; and

“Convolution Code for Use in a Communication System”, U.S. Pat. No.8,677,224, issued 18 Mar. 2014.

One particular problem in multi-path, spread-spectrum systems, includingUWB, is channel-induced noise present in the received signal. One commontechnique for significantly reducing the noise level relative to thereceive level is to develop, during reception of a training sequenceportion of the preamble of each transmitted packet, an estimate of thechannel impulse response (“CIR”). Following detection in the receivedpacket of the start-of-frame delimiter (“SFD”), the best CIR estimate isreversed in time and the complex conjugate is developed. This conjugateCIR estimate is thereafter convolved with the payload portion of thepacket using a channel matched filter (“CMF”). Shown in FIG. 1 is a UWBreceiver 10 adapted to operate in this manner. As is known, the signalreceived via an antenna 12 is continuously conditioned by a filter 14.During reception of the training sequence, channel estimator 16 developsfrom the conditioned signal the conjugate CIR estimate. During receptionof the payload data, detector 18 employs a CMF (not shown) to convolvethe conditioned signal with the conjugate CIR estimate, therebysignificantly improving the signal-to-noise ratio (“SNR”) andfacilitating recovery of the payload data. See, also, “EfficientBack-End Channel Matched Filter (CMF)”, U.S. Pat. No. 7,349,461, issued25 Mar. 2008.

As noted in 802.15.4a, § 5.5.7.1, “UWB devices that have implementedoptional ranging support are called ranging-capable devices (“RDEVs”).”(Emphasis in original.) For certain applications, such RDEVs arecommonly implemented in the form of a relatively compact, autonomousradio-frequency identification (“RFID”) tag or the like. Due to thesmall form factor and limited power supply, it is especially importantto select circuit implementations that provide maximum performance atminimum power. Unfortunately, in known implementations of the UWBreceiver, improvements in performance usually come at the expense ofpower. For example, it is known that a rake filter provides goodperformance in multi-path, spread-spectrum systems such as UWB. See,e.g., slide 21 of “The ParthusCeva Ultra Wideband PHY Proposal”, IEEEP802.15 Working Group for Wireless Personal Area Networks, March 2003, acopy of which is submitted wherewith and which is expressly incorporatedherein in its entirety by reference. However, known rake filterimplementations tend to consume significantly more power than otherprior art techniques.

In ranging systems, as in other RF systems, the receiver must coordinateits internal operation to the signal being received front thetransmitter. In general, the receiver must achieve synchronism with thereceived carrier signal, a process referred to as carrier recovery. Inaddition, the receiver must further achieve synchronism with theinformation signals superimposed on the carrier, a process referred toas timing recovery. We submit that prior art techniques for performingboth carrier recovery and timing recovery in the digital domain are lessthan optimum.

In the RF system topology shown in FIG. 15, it can be seen that, becauseof the non-zero angle of incidence, θ, the RF signal will arrive at oneantenna before the other. In particular, it can be seen that the path toantenna A is greater than to antenna B by p=d*sin(θ). In order tocalculate θ, the angle of incidence, the time difference of arrivalcould be found. If d is relatively large then this would provide quitean accurate estimate of θ. On the other hand, if d is small the estimateturns out to be highly error prone.

FIG. 16 shows two receivers, 70a and 70b, which are clocked from thesame crystal 72. If the same crystal 72 clocks identical phase lockedloops (“PLLs”), 74a and 74b, the generated carriers that are supplied tothe respective down converter mixers, 76ac-76as and 76bc-76as, will havethe same phase. The RF signal will arrive at a slightly later time atantenna A than antenna B, so it will encounter a down converter carrierphase that is different in each of the mixers 76. If the basebandprocessors, 78a and 78b, are capable of calculating the complex impulseresponse of the channel, that impulse response will have a differentin-phase (“I”) to quadrature (“Q”) ratio I/Q which is equal to the phasedelay caused by the signal travelling the extra distance, p, beforeencountering the mixer 70a and being down-converted by the carrier. Ifthe carrier frequency is high, e.g., 4 GHz or 6.5 GHz, then quite smalldistances, p, will lead to a relatively large carrier phase difference.

$\begin{matrix}{{\sin\;\theta} = \frac{p}{d}} & \lbrack {{Eq}.\mspace{14mu} 1} \rbrack \\{\lambda = \frac{c}{f}} & \lbrack {{Eq}.\mspace{14mu} 2} \rbrack\end{matrix}$

where:

-   -   f is the carrier frequency,    -   c is the speed of light, and    -   λ is the carrier wavelength.

$\begin{matrix}{\frac{\alpha}{2\pi} = \frac{\rho}{\lambda}} & \lbrack {{Eq}.\mspace{14mu} 3} \rbrack\end{matrix}$where:

-   -   α is the phase difference between the two carriers for the same        point on the incident RF signal.

$\begin{matrix}{p = {\frac{\alpha\lambda}{2\pi}( {{from}\mspace{14mu}{{Eq}.\mspace{14mu} 2}\mspace{14mu}{and}\mspace{14mu}{{Eq}.\mspace{14mu} 3}} )}} & \lbrack {{Eq}.\mspace{14mu} 4} \rbrack \\{{\sin\;\theta} = {\frac{\alpha\lambda}{2\pi\; d}( {{from}\mspace{14mu}{{Eq}.\mspace{14mu} 1}\mspace{14mu}{and}\mspace{14mu}{{Eq}.\mspace{14mu} 4}} )}} & \lbrack {{Eq}.\mspace{14mu} 5} \rbrack \\{\theta = {\sin^{- 1}\frac{\alpha\lambda}{2\pi\; d}( {{from}\mspace{14mu}{{Eq}.\mspace{14mu} 5}} )}} & \lbrack {{Eq}.\mspace{14mu} 6} \rbrack\end{matrix}$

If, in Eq. 6, d is set to be a half wavelength, then FIG. 17 shows therelationship between α, the phase difference of the impulse responses,and θ, the angle of incidence. Note that the slope of the dark greysection is approximately 3, whereas the slope of the lighter greysection is 0.6, i.e., 5 times worse. If, however, d is set to be a onewavelength, then FIG. 18 shows the relationship between α and θ. Notethat, at this separation, there is an ambiguity in that each phaserelationship has two possible angles of incidence. As can be seen fromFIG. 19, as the antennae are moved further apart, say to 3 wavelengths,the ambiguity only increases.

We submit that the larger separation of one wavelength or more isadvantageous two reasons: first, the slope of the angle of incidencecurve versus phase change curve is larger and stays larger for longer,thereby allowing more accurate determination of angle of incidence; andsecond, as the antennas get closer together, their near fields interfereand their performance starts to affect each other. This is particularlythe case when the separation is lower than one wavelength.

We submit that what is needed is an improved method and apparatus foruse in the receiver of a UWB communication system to determine angle ofincidence. In particular, we submit that such a method and apparatusshould provide performance generally comparable to the best prior arttechniques but more efficiently than known implementations of such priorart techniques.

BRIEF SUMMARY OF THE INVENTION

In accordance with a preferred embodiment of our invention, we provide amethod for use in an RF system comprising first and second RF receiversseparated by a predetermined distance, d, and an RF transmitter, themethod comprising the steps of: [1] in the first and second receivers,synchronizing the first and second receivers to a predetermined timebase; [2] in the transmitter, transmitting an RF signal having apredetermined carrier wavelength, λ; [3] in the first receiver,receiving the transmitted signal and developing a first phase value as afunction of the complex baseband impulse response of the receivedsignal; [4] in the second receiver, receiving the transmitted signal anddeveloping a second phase value as a function of the complex basebandimpulse response of the received signal; [5] developing a phasedifference value, α, as a function of the first and second phase values;and [6] developing an angle of arrival, θ, of the transmitted signalrelative to the first receiver according to the following:

$\theta = {\sin^{- 1}{\frac{\alpha\lambda}{2\pi\; d}.}}$

The methods of our invention may be embodied in computer readable codeon a suitable computer readable medium such that when a processorexecutes the computer readable code, the processor executes therespective method.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

Our invention may be more fully understood by a description of certainpreferred embodiments in conjunction with the attached drawings inwhich:

FIG. 1 illustrates, in block diagram form, a prior art receiver adaptedfor use in a UWB communication system;

FIG. 2 illustrates, in block diagram form, one embodiment of thereceiver shown in FIG. 1, but constructed in accordance with ourinvention;

FIG. 3 illustrates, in block diagram form, the portion of the receivershown in FIG. 2 that performs carrier and timing recovery when thereceiver is operating in a carrier acquisition mode;

FIG. 4 illustrates, in block diagram form, the portion of the receivershown in FIG. 2 that performs carrier and timing recovery when thereceiver is operating in a data recovery mode;

FIG. 5 illustrates, in block diagram form, the error angle calculationblock shown, e.g., in FIG. 3;

FIG. 6 illustrates, in relative isolation, those components of thereceiver shown in FIG. 3 adapted to perform carrier recovery;

FIG. 7 illustrates, in block diagram form, a programmable scaler adaptedfor use with our carrier loop filter shown in FIG. 6;

FIG. 8 illustrates, in signal wave form, our approach to scale thefiltered phase error estimate and apply it to the accumulator more oftenthan once per symbol in the case of 850 kb/s;

FIG. 9 illustrates, in signal wave form, our approach to scale thefiltered phase error estimate and apply it to the accumulator more oftenthan once per symbol in the case of 6.8 Mb/s;

FIG. 10 illustrates, in signal wave form, our approach to scale thefiltered phase error estimate and apply it to the accumulator more oftenthan once per symbol in the case of 110 kb/s;

FIG. 11 illustrates, in block diagram form, a rotator adapted for usewith our carrier loop filter shown in FIG. 6;

FIG. 12 illustrates, in relative isolation, those components of thereceiver shown in FIG. 4 adapted to perform timing recovery;

FIG. 13 illustrates, in block diagram form, a resampler adapted for usewith our timing recovery loop shown in FIG. 12;

FIG. 14 illustrates, in flow diagram form, a process for seeding thetiming loop filter shown in FIG. 12.

FIG. 15 illustrates, generally in topographic perspective, an RFcommunication system, and, in particular, illustrates the differentangles of incidence of the transmitted RF signal on two antennas spacedapart by a distance d;

FIG. 16 illustrates, in block diagram form, the antennas of FIG. 15,together with the respective RF receivers;

FIG. 17 illustrates, in waveform, the ratio of the phase shift of thecarrier as a function of angle of incidence with respect to two ½wavelength separated antennas;

FIG. 18 illustrates, in waveform, the ratio of the phase shift of thecarrier as a function of angle of incidence with respect to two 1wavelength separated antennas;

FIG. 19 illustrates, in waveform, the ratio of the phase shift of thecarrier as a function of angle of incidence with respect to two antennasseparated by 3 wavelengths;

FIG. 20 illustrates, in waveform, the ratio of the phase shift of thecarrier as a function of angle of incidence with respect to two antennasseparated by 7.5 cm at two different carrier frequencies; and

FIG. 21 illustrates, in waveform, the resultant calculated angle ofincidence for a 100 packet test.

In the drawings, similar elements will be similarly numbered wheneverpossible. However, this practice is simply for convenience of referenceand to avoid unnecessary proliferation of numbers, and is not intendedto imply or suggest that our invention requires identity in eitherfunction or structure in the several embodiments.

DETAILED DESCRIPTION OF THE INVENTION

Shown in FIG. 2 is a UWB receiver 10′ constructed in accordance with ourinvention. As in the prior art system shown in FIG. 1, the signalreceived by antenna 12 is continuously conditioned by filter 14. Theconditioned signal is then periodically sampled by an analog-to-digitalconverter (“ADC”) 20 and provided as a continuous series of digitalsamples. In accordance with a preferred embodiment of our invention, ADC20 is specially adapted to provide each digital sample in ternary form,i.e., [−1, 0, +1]. In view of the difficulty of currently availablestandard digital circuit technology efficiently to represent a 3-valuevariable in the form of a single ternary trit, we anticipate, at leastin the near term, such variables will require representation using 2conventional, binary bits, wherein a first one of the bits representsthe numeric component of the variable, i.e., [0, 1], and the second bitrepresents the sign of the variable, i.e., [+, −]. In this regard, itcould be argued that circuit technology has not progressed all that muchsince Soviet researchers built the first (perhaps only?) documentedternary-based computer systems. See, “A Visit to Computation Centers inthe Soviet Union,” Comm. of the ACM, 1959, pp. 8-20; and “SovietComputer Technology—1959”, Comm. of the ACM, 1960, pp. 131-166; copiesof which are submitted herewith and which are expressly incorporatedherein in their entirety by reference.

In the context of our invention, our trit can be distinguished from aconventional sign+magnitude implementation such as that described inAmoroso83, cited above. Consider the strategy for A/D conversion shownin FIG. 5 of Amoroso83; and, note, especially, that there are threeseparate and distinct switching thresholds: (i) a sign threshold[T_(o)]; (ii) a positive magnitude threshold [T_(o)+Δ]; and (iii) anegative magnitude threshold [T_(o)−Δ]. (See, also, Amoroso83, p. 1119,lines 21-24.) We have discovered that adapting the ADC to use ONLY apositive magnitude threshold [T_(o)+Δ] and a negative magnitudethreshold [T_(o)−Δ] results in only a very small loss in resolution,while improving the performance of an impulse radio UWB receiver.Accordingly, in our preferred embodiment, ADC 20 implements onlypositive/negative magnitude thresholds [T_(o)±Δ], thereby simplifyingthe circuit while simultaneously improving both the conversion time ofthe ADC 20 and, in general, the performance of the receiver. Such animplementation lends itself naturally to our trit-based scheme, whereinthe three defined states indicate, for example, that:

-   -   [−1]=>the input is below the negative magnitude threshold        [T₀−Δ];    -   [0]=>the input is between the negative magnitude threshold        [T₀−Δ] and the positive magnitude threshold [T₀+Δ]; and    -   [+1]=>the input is above the positive magnitude threshold        [T₀+Δ].        In contrast to a conventional sign+magnitude implementation, our        trit-based ADC 20 can be readily adapted to operate either at a        higher sample rate (improved performance but with more power) or        at an equivalent sample rate (substantially equivalent        performance but with less complexity, thereby reducing both        circuit size and power consumption).

Additional details relating to the construction and operation of our UWBreceiver 10′ can be found in the Related References. As explained in theRelated References, receiver 10′ initially operates in an acquisitionmode, during which the components are configured to detect an incomingUWB signal transmitted by a remote UWB transmitter (not shown), and toachieve synchronism with that transmission, a process referred to asacquisition. Having achieved acquisition, receiver 10′ transitions intoa data mode, during which the components are configured to recover datacontained within each transmitted packet, a process referred to asdemodulation or data recovery.

Shown in FIG. 3 are the components of our receiver 10′ that performcarrier and timing recovery when the receiver 10′ is operating in theacquisition mode. As explained in our Related References, duringoperation, ADC 20 develops trit-valued samples of both the in-phase,Sr[5:0], and quadrature, Si[5:0], components of the received signals. Inthe acquisition mode, these samples are passed to the correlator 24,where they are correlated against the predefined preamble code. If avalid preamble is present, the output of the correlator 24 comprises anoisy estimate of the channel impulse response (“CIR”). This noisy CIRestimate is passed, without carrier and timing recovery, to accumulator26. If a preamble is present, then, as accumulator 26 adds symbolstogether, the CIR estimate will grow faster than the noise floor. Bycomparing successive accumulated groups of CIR estimates, theacquisition control logic (described in our Related References) candetermine if there is a valid preamble present.

Once a preamble has been identified, the carrier recovery logic isactivated to correct carrier error in the received data. Logic 46computes an instantaneous phase error estimate of the received UWBsignal by performing an inverse tangent operation on the in-phase, i.e.,real, and quadrature, i.e., imaginary, components of the signal phasor.A carrier loop filter 48 uses this estimate to compute a correctionangle to be applied to the current input to the accumulator 26. Thiscorrection angle is developed as a carrier recovery phase signal (7-bitsunsigned) wherein the output range is 0.0 to almost 2.0, and where thevalue 2.0 is equivalent to one revolution. A look-up-table (“LUT”) 50converts the correction angle to a corresponding pair of cosine (5-bits,including a sign bit) and sine (5-bits, including a sign bit) values.Using these sine and cosine values, a rotator 52 rotates the correlatedsamples by implementing a complex multiplication for each sample,followed by rounding to return the output real and imaginary samples to7-bit signed values. The rotated correlated samples are then resampledby resample 54 for use by the accumulator 26.

There is a finite probability that a detected preamble is not valid.Accordingly, our accumulator 26 spends some time assessing the qualityof the incoming signal. If the quality is found to be poor, the preambleis rejected and accumulator 26 resumes searching for a preamble. If thequality is found to be sufficiently high, the next task is to search fora start-of-frame-delimiter (“SFD”) by comparing the incoming correlatorsamples against the accumulated CIR estimate. This is performed for eachsymbol, and the result quantised to a 2-bit signed value. This 2-bitsigned value should be +1 throughout the preamble, but then, once theSFD pattern is received, it should follow the pattern of the SFD. Forexample, for a short SFD, this would be [0, +1, 0, −1, +1, 0, 0, −1]. Acorresponding search pattern is used to find this sequence on the 2-bitquantised values. This allows the SFD pattern to be identified, and thetime to transition to data mode determined.

Shown in FIG. 4 are the components of our receiver 10′ that performcarrier and timing recovery when the receiver 10′ is operating in thedata mode. No later than the end of the acquisition mode, the CIRestimate developed by accumulator 26 is loaded into thechannel-matched-filter (“CMF”) 36. Once receiver 10′ switches to datamode, the ADC 20 samples are passed to the CMF 36, which gathers theenergy of the received UWB pulses together, thereby compensating for thesmearing effect of the multi path channel. The resulting output pulsesare passed through the timing and carrier recovery loops to compensatefor any offset, and then into despreader 40. Despreader 40 applies thesame pseudo-random noise (“PN”) spreading sequence used in thetransmitter (not shown) to generate the burst, and integrates over theburst. As despreader 40 does not know if a logic_1 or a logic_0 is beingtransmitted, it despreads at both possible locations to produce twoestimates. These two estimates provide the soft input to the Viterbidecoder 42, which produces a maximum likelihood estimate of the bitsequence. The first section of the packet to be demodulated is the PHYheader (“PHR”), which contains information about the data rate and thenumber of octets transmitted. As is known, this is protected by asingle-error-correct-double-error detect (“SECDED”) code. Once the PHRis decoded, the relevant information is extracted to allow thedemodulation, i.e., recovery, of the data payload. The remaining payloadis then passed through the Viterbi decoder 42 to Reed-Solomon (“RS”)decoder 44 to correct any errors or report errors that cannot becorrected.

As shown in FIG. 3, in the acquisition mode, the instantaneous phaseerror estimate is derived front the output of correlator 24 as follows:

-   1. The accumulated samples, Sr[14:0] and Sr[14:0], are quantized and    the conjugate calculated in logic block 56;-   2. The complex correlated samples from resampler 54 are multiplied    by the conjugate by multiplier 58; and-   3. The products are summed by summer 60 to produce the complex    instantaneous phase error estimate phasor, comprising Sr[15:0] and    Si[15:0].

As shown in FIG. 4, in the data mode, the complex instantaneous phaseerror estimate phasor simply comprises the outputs of despreader 40,comprising, Sr[15:0] and Si[15:0].

The instantaneous phase error estimate phasor is then converted to acorresponding angle by logic block 62. As shown in FIG. 5, the complexerror estimate phasor consists of two 17-bit signed numbers. The angleof the phasor is determined by dividing the imaginary component of thephasor, Si[15:0], by the real component, Sr[15:0]. Ideally the resultingquotient would then be passed to an inverse tangent function to computethe exact angle; however, for the purposes of our carrier recoveryalgorithm, we have determined that the quotient per se is a sufficientapproximation to the angle. To simplify the division computation, wefirst identify the sign and quadrant of the phasor, and then compute theabsolute value of the real and imaginary parts. These absolute valuesare then passed to the division computation, and the resulting angle ispost-processed to map it into the appropriate quadrant/sign. Theremapped estimate is then subjected to rounding and saturation toproduce the signed 7-bit instantaneous phase error estimate, S[0:−5], inradians.

The structure of carrier loop filter 48 can be seen in greater detail inFIG. 6. As shown, the instantaneous phase error estimate is passedthrough a proportional gain arm 48a and an integral gain arm 48b. Thegains, K_(p) and K_(i), are controlled by a gear-shifting algorithm toallow the loop to lock quickly, and then to rapidly tighten to a narrowbandwidth to minimise the impact of noise on the carrier recoveryalgorithm. The gear shifting is controlled by a counter (e.g., see, FIG.7) that counts the number of phase error estimates supplied to the loop,and selects a respective scaling factor. (The default gear shiftingtable is described below.) The filtered phase error estimate isaccumulated in a carrier phase accumulator 48c to track the over-allphase error, and to adjust the instantaneous phase error to trackfrequency errors of up to +/−40 ppm.

When receiver 10′ transitions from acquisition to data mode, the rate ofupdate of the carrier recovery loop 48 will change (from the preamblesymbol interval to the data symbol interval); this requires that theintegral term in the carrier loop filter 48b be scaled to compensate forthis change as follows:

TABLE 1 Carrier Loop Filter Scaling Table Preamble Data Scale SymbolSymbol Factor 992 1024 33/32 1016 10124 129/128 992 8192 8 * (33/32) 1016 8192 8 * (129/128)

In data mode, we have determined that the application of the phaserotation in a single “lump” at the end of each symbol has a negativeimpact on the performance of the receiver. For the 6.8 Mb/s case, thephase is applied at the end of a group of 8 symbols, so the symbolstowards the end of this group suffer from increased phase error ascompared to those at the start. Similarly for the 850 kb/s case, thesymbols representing a logic_1 will have a higher phase error than thoserepresenting a logic_0. Worst of all is the 110 kb/s case, which willsuffer from a phase error increase throughout a symbol and, depending onthe hop position of the symbol, will have an effectively random phaseerror to start with if the carrier offset is high enough. To compensatefor this, our preferred embodiment will smooth the phase rotation duringthe data demodulation phase.

As shown in FIG. 7, our approach is to scale the filtered phase errorestimate and apply it to the accumulator more often than once persymbol. In the case of 850 kb/s, the filtered phase error will be scaleddown by a factor of 2 and accumulated twice (i.e., every 64 clockcycles) during the phase update interval. (See, e.g., FIG. 8.) Thismeans that instead of the phase adjustment being applied in a singlelump at the end of the interval, it will be distributed over the courseof the symbol, thereby allowing the despread data towards the end of theinterval to have a more accurate phase correction. In the case of 6.8Mb/s, the filtered phase error will be scaled down by a factor of 8 andaccumulated 8 times (i.e., every 16 clock cycles) during the phaseupdate interval. (See, e.g., FIG. 9.) In the case of the 110 kb/s, thefiltered phase error estimate will be scaled down by a factor of 64 andaccumulated 64 times (i.e., every 16 clock cycles) during the phaseupdate interval. (See, e.g., FIG. 10.) The despreader 40 will controlwhen the phase rotation is applied, so that the phase rotation isupdated just before it is needed for demodulation of a burst.

In our preferred embodiment, we implement a register-based fieldprogrammable gear shifting mechanism. Ten gears may be configured; oneis reserved for demodulation mode, allowing nine acquisition gears. Eachgear is assigned: a count at which it is activated; a K_(p) value; and aK_(i) value. Writing a value of logic_0 as the count for a gear otherthan the first gear terminates the gear shifting table; whilst stillswitching to the demodulation gear when the acquisition phase is over.Note that two sets of demodulation coefficients must be specified, onefor the 110 Kbps data rate case, and one for the 850K and 6.81 Mbpscases. The default values for each of the available programmableregisters are given in the following table:

TABLE 2 Carrier Recovery Loop Gear Shifting Table Register Count K_(i)K_(p) CR0 0 0x8: 3 * 2⁻⁶ 0x7: 2⁻³ CR1 12 0x7: 3 * 2⁻⁷ 0x7: 2⁻³ CR2 200x6: 3 * 2⁻⁸ 0x6: 2⁻⁴ CR3 32 0x6: 3 * 2⁻⁸ 0x6: 2⁻⁴ CR4 40 0x5: 3 * 2⁻⁹0x5: 2⁻⁵ CR5 64 0x4: 3 * 2⁻¹⁰ 0x5: 2⁻⁵ CR6 128 0x3: 3 * 2⁻¹¹ 0x4: 2⁻⁶CR7 192 0x2: 3 * 2⁻¹² 0x4: 2⁻⁶ CR8 256 0x1: 3 * 2⁻¹³ 0x3: 2⁻⁷ CR9 10230x0: 3 * 2⁻¹⁴ 0x3: 2⁻⁷The K factors are coded as follows:

Minimum Maximum Decode Count 1 1023 Sample count on which to applygearing values Ki 0x0 0xA 0x0 = 2⁻¹¹ × (2⁻² + 2⁻³) 0x1 = 2⁻¹⁰ × (2⁻² +2⁻³) 0x2 = 2⁻⁹ × (2⁻² + 2⁻³) 0x3 = 2⁻⁸ × (2⁻² + 2⁻³) 0x4 = 2⁻⁷ × (2⁻² +2⁻³) 0x5 = 2⁻⁶ × (2⁻² + 2⁻³) 0x6 = 2⁻⁵ × (2⁻² + 2⁻³) 0x7 = 2⁻⁴ × (2⁻² +2⁻³) 0x8 = 2⁻³ × (2⁻² + 2⁻³) 0x9 = 2⁻² × (2⁻² + 2⁻³) 0xA = 2⁻¹ × (2⁻² +2⁻³) 0xB-0xF - invalid Kp 0x0 0x7 0x0 = 00 0x1 = 2⁻⁹ 0x2 = 2⁻⁸ 0x3 = 2⁻⁷0x4 = 2⁻⁶ 0x5 = 2⁻⁵ 0x6 = 2⁻⁴ 0x7 = 2⁻³

Under very noisy conditions, the carrier recovery loop may fail to lockcorrectly. This will result in a preamble rejection in the accumulator26 (if this mode is enabled), effectively giving the carrier recoveryloop another shot. The timing recovery loop can still fail to lock,however, and it does not get another chance since by the time this hasan effect the preamble will likely be confirmed.

Preferably, LUT 50 updates the SIN (5-bits signed) and COS (5-bitssigned) values under the control of accumulator 26 during acquisitionmode and by despreader 40 during data mode. This is in order to preventphase changes being applied at times when the data is important to thealgorithm in question, so it must be applied outside of the impulseresponse during acquisition, and outside of a burst position duringdemodulation.

Rotator 52 takes the SIN and COS values from LUT 50 and applies them tothe incoming data vectors. This rotation is applied to the correlator 24outputs during acquisition, and to the CMF 36 outputs during datademodulation. As shown in FIG. 12, the first stage, T0, selects betweenthe registered outputs of correlator 24 and CMF 36 depending on themode. The second stage, T1, performs the 4 multiplications that arerequired for a full complex multiplication, these multiplication resultsare then registered. The third stage, T2, sums the real components andthe imaginary components of the complex multiplication, applies roundingto return the rotated samples to a precision of 7-bits (signed) andregisters them for the output. Therefore the total latency of therotator 52 is four clock cycles, C0-C3.

Our timing estimation is based on an early-late gating algorithm. Asillustrated in FIG. 3 and FIG. 4, the source of data for this algorithmis dependent upon the phase of reception: during acquisition mode, thenecessary timing information is derived from the output of CMF 36; and,during data mode, the despreader 40 provides the necessary timinginformation. In both cases the information is used to generate aninstantaneous timing estimate. This estimate is conditioned and passedinto a timing loop filter 64 typical of a second order loop. The timingloop filter 64 output provides sample-level timing adjustmentinformation to the resampler 54 during acquisition mode, and clock cyclelevel adjustments to the accumulator 26 and despreader 40 during datamode.

As shown in FIG. 12, during acquisition mode, the timing estimate isderived from early/on-time/late samples from the output of the CMF 36.Once the preamble has been detected, the accumulator 26 will startwriting CIR coefficients to the CMF 36. As noted before, the output ofthe correlator 24 provides an instantaneous noisy estimate of the CIR.As the timing offset error accumulates in the accumulator 26, theposition of this estimate within the symbol will slowly vary. Quantizingthe correlator 24 output and feeding it into the CMF 36 result in acorrelation peak at the output of the CMF 36 corresponding to theposition of the noisy impulse response estimate in the correlator 24output symbol. In our preferred embodiment, the functions ofquantisation of the correlator 24 output and routing to CMF 36 areperformed by resampler 54.

As the timing of the incoming signal changes, the position of thiscorrelation peak in the output of the CMF 36 will move. In general, thismovement will be gradual relative to one preamble symbol duration andtherefore can be tracked. The accumulator 26 provides a timing flag toindicate when the correlation peak is expected at the output of the CMF36. This flag is based on the latency of the accumulator 26 and CMF 36relative to the estimated impulse response location. Initially, thiswill be very accurate as the timing phase error will be negligible, but,as the phase error accumulates, the peak will move, thus providing thedesired timing information. The correlation peak is ideally the on-timesample, with the early and late samples being the one immediatelypreceding and following the on-time sample respectively. These threesamples are passed to a phase detector 66 (see, FIG. 3) that computes aninstantaneous timing phase error for the timing loop filter 64.

During demodulation, the despreader 40 provides dedicated early and lateoutputs in addition to the normal on-time output used as part of thedemodulation process. These outputs are provided for both possible burstpositions (depending on if the data is a logic_0 or a logic_1); thus, anearly instantaneous decision is needed in order to identify which of thetwo sets of early/on-time/late samples to use in computing theinstantaneous timing phase error estimate. Once this decision is made,the computation is performed and the error passed to the the timing loopfilter 64.

The phase error estimation is based on the previously describedearly/on-time/late samples. A difference computation is performed bycomputational block 68. The difference between the early and late valuesis computed and checked against the on-time (on-time should be greater).If the on-time value is negative or zero (after conditioning), then thedata is unreliable and the phase estimate zeroed. The difference isdivided by twice the peak and the result checked to be less than 0.75(otherwise it is considered unreliable) and passed out as theinstantaneous timing error estimate in the format S[−1:−4]. Thisinstantaneous timing error estimate is then passed on to the timing loopfilter 64.

As shown in FIG. 12, timing loop filter 64 comprises a proportional gainarm 64a and an integral gain arm 64b. The gains, Kp and Ki arecontrolled by a gear-shifting algorithm to allow the loop to lockquickly and then rapidly to tighten to a narrow bandwidth to minimisethe impact of noise on the timing recovery algorithm. The gear shiftingis controlled by a counter (e.g., see, FIG. 7) that counts the number oftiming error estimates supplied to the loop and operates, in oneexample, as follows:

TABLE 3 Timing Estimation Loop Gear Shifting Table Number of samplesK_(p) K_(i) 0-5 0 0  5-28 31/(2⁻⁷) 0 28-80 31/(2⁻⁷) 20/(2⁻¹¹)   80-12015/(2⁻⁷) 5/(2⁻¹¹) 120 onwards 11/(2⁻⁷) 1/(2⁻¹¹)

Timing loop filter accumulator 64c accumulates the lower noise estimateof the timing phase error to track the timing phase error and adjust thesampling phase error between 0 and +15.875 samples. Timing loop filter64 also develops phase increment (“Inc”) and phase_decrement (“Dec”)signals that are used to adjust the timing in units of 16 samplesbecause they either drop or add a clock cycle delay in the accumulator26 (during acquisition) or despreader 40 (during demodulation).Therefore, if an adjustment of −2.5 samples is required, then phase_incis used to introduce an offset of −16 samples, while the phase errordriving resampler 40 will apply a correction of +13.5 samples, givingthe overall required phase adjustment of −2.5 samples. Similarly, forexample, an adjustment of +19.125 samples may be achieved by applying a+16 sample adjustment with the phase_dec signal, followed by anadditional +3.125 sample correction in the resampler 54. By way ofillustration, a suitable embodiment of resample 54 is illustrated inFIG. 13.

The carrier recovery loop needs to lock quickly in order to successfullyreceive the signal, whereas the timing recovery loop can take longer. Asa result, if the carrier recovery loop fails to lock soon after thepreamble is found, then the preamble will be rejected, allowing thecarrier recovery loop another chance to lock. The timing recovery loop,however, does not get a second chance, so, to improve the chances oflock, the timing recovery loop can be seeded with an estimate based onthe carrier loop integrator. Preferably, seeding is enabled via the useof a control signal: if the state of this signal is, e.g., logic_0, thentiming seeding does not take place and the gearing table (see, below)must be set up to allow for this (initially wide bandwidth to allowacquisition, then narrowing as the lock improves); but, if the state ofthis signal is, e.g., logic_1, then timing seeding is enabled and theloop is assumed close to lock from the outset, and a more aggressivegearing table can be used. In our preferred embodiment, seeding isenabled by default.

We have determined that the value of the loop integrator in the carrierrecovery loop can be used to seed the loop integrator in the timingrecovery loop, thereby giving the timing recovery loop a jump start andenhancing the chances of it locking. The formula we prefer to use tocompute the seed value is:I_(tim)=(Scale)(I_(car))

where:

-   -   I_(tim)=timing loop integrator;    -   I_(car)=carrier loop integrator;

${Scale} = \frac{F_{s}}{2\; F_{c}}$

-   -   F_(s)=sampling rate; and    -   F_(c)=carrier frequency.        Since F_(s) and F_(c) are related this is simpler in practice:

Fc (MHz) Channel Scale Factor 3494.4 1 1/7 3993.6 2, 4 1/8 4492.8 3 1/96489.6 5, 7 1/13As shown in FIG. 14, we prefer to allow the carrier recovery loop tosettle on a good quality estimate before seeding the timing recoveryloop; we define the delay in terms of the carrier recovery loop gearingcounter and prefer to make this threshold value programmable. Once thisgearing counter threshold value is reached, the value held in thecarrier recover loop integrator is scaled according to the table above(depending on the channel setting) to produce a timing seed value withthe precision S[−1:−15]. Rounding does not need to be applied to thiscomputation, just truncation, because the computation is a one-timeevent in the receiver 10′ and does not take part in a recursiveloop—therefore the bias introduced by not rounding will not accumulateto cause significant inaccuracy.

In our preferred embodiment, we implement a register-based fieldprogrammable gear shifting mechanism. Ten gears may be configured; oneis reserved for demodulation mode, allowing nine acquisition gears. Eachgear is assigned: a count at which it is activated; a K_(p) value; and aK_(i) value. Writing a value of logic_0 as the count for a gear otherthan the first gear terminates the gear shifting table; whilst stillswitching to the demodulation gear when the acquisition phase is over.Note that two sets of demodulation coefficients must be specified, onefor the 110 Kbps data rate case, and one for the 850K and 6.81 Mbpscases. The default values for each of the available programmableregisters are given in the following table:

TABLE 4 Timing Estimator Default Programmable Gear Shifting RegisterValues Default Register Value Count [9:0] K_(i) [14:10] K_(p) [19:15]TR0 0XF8000 0 0 31 TR1 0x8141E 30 5 16 TR2 0X58428 40 1 11 TR3 0X00000 00 0 TR3 0X00000 0 0 0 TR5 0X00000 0 0 0 TR6 0X00000 0 0 0 TR7 0X00000 00 0 TR8 0X00000 0 0 0 TR9 0X5A161 N/A ⅛ (110 Kbps) 11 where: Valuecomprises a 20-bit variable expressed in hexadecimal format; Countcomprises bits [9:0] of the Value; Ki comprises bits [14:10] of theValue; and Kp comprises bits [19:15] of the Value.The K factors are coded as follows:

TABLE 5 Gear Shifting Register Value Decode Minimum Maximum Decode Count1 1023 Sample count on which to apply gearing values Ki 0x00 0x1F 0x00 =00 0x01 = 1 × 2⁻⁷ 0x1F = 31 × 2⁻⁷ Kp 0x00 0x1F 0x00 = 00 0x01 = 1 × 2⁻⁷0x1F = 31 × 2⁻⁷Computing Angle of Incidence:

In a practical coherent receiver, it is necessary to track the carrierof the transmitter. For example, in the system of FIG. 16, bothreceivers 70 will be doing this, but because of different noise inputmixed with the received signal, they will not necessarily do itidentically. In, for example, the clock tracking loop shown in FIG. 3,the correlator output is accumulated to identify the channel impulseresponse, but before it is accumulated it is rotated by a carriercorrection. Because this rotation is likely to be different in each ofthe receivers 70, it must be undone in order to calculate the phasedifference between the two carriers. For example, with reference to FIG.3, during an angle of incidence calculation mode, the rotator 52 can berendered inoperative (or, alternatively, LUT 50 can be configured tooutput a fixed rotation of 0□); otherwise, the logic 46 works asdescribed above. The phase difference between the two carriers istherefore the difference between the angles of the first paths in theaccumulators minus the individual phase corrections that have beenapplied at the time the accumulation of the channel impulse responsestops and is measured. FIG. 21 shows the calculated angle of arrivalwhen repeated, using this method, on 100 separate packets. In the test,the actual angle of arrival was −5□ and the antennas were separated byone wavelength. The carrier frequency used in this test was 4 GHz, andthe standard deviation of the error was 2.1□.

We propose two ways to solve the ambiguity in solutions that occurs atan antenna separation of more than ½ a wavelength. First, we measure thetime of arrival of the packet at each antenna. The angle of incidencethat is most consistent with the measured time of arrival differences isthe one chosen. Take the example shown in FIG. 18. If a is measured as−125° then there are two possible values for θ either −20° or +40°. Ifthe signal arrived at antenna A first, then −20° is the correct but ifthe signal arrives at antenna B first, then +40° is correct. Second, weresolve the ambiguity is by sending two packets but at different carrierfrequencies. FIG. 20 shows an example of the relationship between α andθ for two different carrier frequencies. Because the curves aredifferent, only one of the possible solutions occurs at both carrierfrequencies. For example, if θ, the angle of incidence was −50° then aat 4 GHz would be measured as +90° which could correspond to an α ofeither −50° or of +15°. At 6.5 GHz would be measured at −90° which couldcorrespond to an a of either −50°, 10° or +24°. Since −50° is the onlysolution in common, it must be the correct one. Of course in practice,noise in the system means that the common solution will not be exactlythe same so it will be necessary to choose the solution which has thesmallest difference in the two sets of possible solutions.

Even if the two receivers 70a and 70b are fed from the same clock, itmay happen that the delay of this clock to one receiver is different tothe delay to the other receiver. In this case there will be a fixedphase difference between the carriers. However, this phase differencecan be calibrated, e.g., by measuring a at a known angle of arrival andsubtracted from a, before applying the formula of Eq. 6.

Rather than supplying the two different PLLs, 76a and 76b, with thecommon crystal 72, there are other ways to synchronize the receivers 70,e.g, the two receivers 70a and 70b could be synchronized by supplyingboth with a clock from a single PLL, e.g., the PLL 76a.

Although we have described our invention in the context of particularembodiments, one of ordinary skill in this art will readily realize thatmany modifications may be made in such embodiments to adapt either tospecific implementations. By way of example, it will take but littleeffort to adapt our invention for use with a different ADC scheme whenit can be anticipated that the target application will not be subject tosignificant levels of in-channel CW interference. Further, the severalelements described above may be implemented using any of the variousknown semiconductor manufacturing methodologies, and, in general, beadapted so as to be operable under either hardware or software controlor some combination thereof, as is known in this art. Alternatively, theseveral methods of our invention as disclosed herein in the context ofspecial purpose receiver apparatus may be embodied in computer readablecode on a suitable computer readable medium such that when a general orspecial purpose computer processor executes the computer readable code,the processor executes the respective method.

Thus it is apparent that we have provided an improved method andapparatus for use in the receiver of a UWB communication system todetermine angle of incidence. In particular, we submit that such amethod and apparatus should provide performance generally comparable tothe best prior art techniques but more efficiently than knownimplementations of such prior art techniques.

The invention claimed is:
 1. In a radio frequency (“RF”) systemcomprising an RF transmitter, a first RF receiver having a firstantenna, and a second RF receiver having a second antenna, the first andsecond antennas being separated by a predetermined distance, d, a methodcomprising the steps of: [1] in the first and second receivers receiver,using respective a first and second clock tracking loops loop tosynchronize the carrier phase of said the first receiver to thetransmitter and in the second receiver, using a second clock trackingloop to synchronize the carrier phase of the second receiver to thetransmitter; [2] in the transmitter, transmitting an ultra-wideband(“UWB”) signal having a predetermined carrier wavelength, λ; [3] in thefirst receiver: [3.1] receiving the transmitted UWB signal; [3.2]developing a first phase value as a function of the complex basebandimpulse response of said received UWB signal; and [3.3] correcting thefirst phase value by subtracting the phase of the first clock trackingloop; [4] in the second receiver: [4.1] receiving the transmitted UWBsignal; [4.2] developing a second phase value as a function of thecomplex baseband impulse response of said received UWB signal; and [4.3]correcting the second phase value by subtracting the phase of the secondclock tracking loop; [5] developing a phase difference value, α, as afunction of difference between the corrected first and second phasevalues; and [6] developing an angle of arrival, θ, of the transmittedUWB signal relative to the first receiver as a function of d, λ and α.2. The method of claim 1 wherein, if d is at least λ/2, step [6] isfurther characterized as: [6] developing a plurality of angles ofarrival, θ, of the transmitted UWB signal relative to the first receiveraccording to the following:${\theta = {\sin^{- 1}\frac{\alpha\lambda}{2\pi\; d}}};$ the methodfurther comprising the step of: [8] in the first and second receivers,determining respective first and second times of arrival of thetransmitted UWB signal; and [9] selecting one of the plurality of anglesof arrival as a function of the first and second times of arrival. 3.The method of claim 1 wherein, if d is at least λ/2, step [6] is furthercharacterized as: [6] developing a plurality of angles of arrival, θ, ofthe transmitted signal relative to the first receiver according to thefollowing: ${\theta = {\sin^{- 1}\frac{\alpha\lambda}{2\pi\; d}}};$ themethod further comprising the step of: [8] performing steps [1] through[6] using a first carrier wavelength λ₁; [9] performing steps [1]through [6] using a second carrier wavelength Δ₂ different than thefirst carrier wavelength λ₁; and [10] selecting one of the plurality ofangles of arrival as a function of the first and second carrierwavelengths.
 4. A non-transitory computer readable medium includingexecutable instructions which, when executed in a processing system,cause the processing system to perform all of the steps of a methodaccording to any one of claims 1, 2 and 3.